Patel, RutuRutuPatelMaheshwari, OmOmMaheshwariMohapatra, Nihar R.Nihar R.Mohapatra2025-08-312025-08-312024-01-01[9798350371529]10.1109/EDTM58488.2024.105118502-s2.0-85193289230http://repository.iitgn.ac.in/handle/IITG2025/29083This work discusses the optimization of a Step Field Plate (SFP) RF LDMOS transistor to enhance Power Amplifier (PA) performance. The impact of structural parameters: length of overlap between gate and P-well mask (L_w), between gate and N-LDD mask (L_x) and length of gate (L_G) on transconductance, device capacitances and operating frequency of the transistor is analyzed. Next, they are fine tuned to maximize large signal performance- output power, gain, and efficiency- of a common source PA circuit.falseLDMOS transistor | Power Amplifier | RFConference Paper202400