Physics-based Scalable Compact Model for Terminal Charge, Intrinsic Capacitance and Drain Current in Nanosheet FETs

Singh, AishwaryaAishwaryaSinghGaneriwala, Mohit D.Mohit D.GaneriwalaMohapatra, Nihar RanjanNihar RanjanMohapatra2025-08-312025-08-312024-01-01[9798350371529]10.1109/EDTM58488.2024.105117912-s2.0-85193224053http://repository.iitgn.ac.in/handle/IITG2025/29173This work presents a physics-based SPICE compatible model for Nanosheet FETs, which provides explicit expressions for the drain current, terminal charges and intrinsic capacitances. The drain current model is based on the drift-diffusion formalism for carrier transport. The terminal charge and intrinsic capacitance models are calculated by adopting the Ward-Dutton linear charge partition scheme that guarantees charge conservation. The model uses the novel bottom-up approach to calculate the terminal charges, uses very few empirical parameters and is accurate across device dimensions and bias conditions.falsebottom-up scalable compact model | nanosheet FET | quantum confinement | terminal charges | Ward-DuttonPhysics-based Scalable Compact Model for Terminal Charge, Intrinsic Capacitance and Drain Current in Nanosheet FETsConference Paper20241cpConference Proceeding1