Investigating the analog performace of FinFETs in sub-10nm Wfin regime by analyzing the drain saturation voltage (VDS,SAT )

Mohapatra, Nihar RanjanJain, ShubhamShubhamJain2025-09-042025-09-042020-01-01http://repository.iitgn.ac.in/handle/IITG2025/32204ill.; 30 cm.18210080Electrical EngineeringTCAD SimulationRF parametersSemiconductor DevicesCMOS TechnologyInvestigating the analog performace of FinFETs in sub-10nm Wfin regime by analyzing the drain saturation voltage (VDS,SAT )M.Techvii, 51p.M.Tech123456789/500