Maheshwari, OmOmMaheshwariKumar, PardeepPardeepKumarBarai, SamitSamitBaraiMohapatra, Nihar R.Nihar R.Mohapatra2025-08-312025-08-312025-01-01[9798331531850]10.1109/ASMC64512.2025.110105572-s2.0-105007519630http://repository.iitgn.ac.in/handle/IITG2025/28373This work introduces a robust machine learning framework for modeling and optimizing the inner spacer etch process in gate-all-around FET fabrication. Using an in-house Particle Monte-Carlo simulator, the etch process is modeled precisely across varied conditions. Gaussian Process Regression outperforms neural network models, achieving 98-99% accuracy in predicting etch front variations. Bayesian Optimization with adaptive sampling and successive domain reduction is utilized to fine-tune etch parameters, minimizing the error between predicted and target etch fronts. This integrated approach enables precise control over spacer-channel geometry, making this approach highly effective for advanced semiconductor manufacturing.falseBayesian optimization | gate all around FETs | Gaussian Process Regression | inner spacer etching | nanoPMC | Particle Monte-CarloConference Paper20250cpConference Proceeding0