Process induced threshold voltage variability in Ultra-Thin Body and Buried Oxide Fully Depleted Silicon on Insulator (UTBB FDSOI) transistors

Mohapatra, Nihar RanjanVerma, Ankit KumarAnkit KumarVerma2025-09-042025-09-042021-01-01https://repository.iitgn.ac.in/handle/IITG2025/32263ill.; hbk.; 30cm.en-US1821009UTBB FDSOITechnology Computer-Aided Design -- TCADLine Edge RoughnessMetal-gate GranularityMoore’s Law And ScalingProcess induced threshold voltage variability in Ultra-Thin Body and Buried Oxide Fully Depleted Silicon on Insulator (UTBB FDSOI) transistorsM.Tech Thesesviii, 38p.123456789/500