Design of 61 GHz phase locked loop in 65 nm CMOS technology for 6G wireless communication systems

Agarwal, Tarun KumarKumari, SapnaSapnaKumari2025-10-102025-10-102025-01-01http://repository.iitgn.ac.in0/handle/IITG2025/32982hbk.: 30 cm.en-US23250038M. TechElectrical EngineeringInteger-NCMOSPhase Locked LoopPhase-DetectorSignal Frequency DividerWireless CommunicationDesign of 61 GHz phase locked loop in 65 nm CMOS technology for 6G wireless communication systemsM.Techv, 57p.M.Tech123456789/500