Zero knowledge and circuit minimization

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dc.contributor.author Allender, Eric
dc.contributor.author Das, Bireswar
dc.contributor.other 39th International Symposium on Mathematical Foundations of Computer Science (MFCS 2014)
dc.coverage.spatial Budapest, HU
dc.date.accessioned 2014-06-26T08:22:10Z
dc.date.available 2014-06-26T08:22:10Z
dc.date.issued 2014-08-25
dc.identifier.citation Allender, Eric and Das, Bireswar, "Zero knowledge and circuit minimization", in the 39th International Symposium on Mathematical Foundations of Computer Science (MFCS 2014), Budapest, HU, Aug. 25-29, 2014. [To appear] en_US
dc.identifier.uri https://repository.iitgn.ac.in/handle/123456789/1341
dc.description.statementofresponsibility by Eric Allender and Bireswar Das
dc.language.iso en en_US
dc.subject Zero knowledge en_US
dc.subject Circuit minimization en_US
dc.title Zero knowledge and circuit minimization en_US
dc.type Article en_US


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