Asymmetrically doped FinFET for low-power analog applications

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dc.contributor.author Surana, Neelam
dc.contributor.author Soni, A.
dc.contributor.author Umap, Abhijit
dc.contributor.author Mekie, Joycee
dc.contributor.author Chaudhuri, S.
dc.contributor.other 3rd International Conference on Emerging Electronic
dc.coverage.spatial IIT Bombay, IN
dc.date.accessioned 2017-05-09T07:20:05Z
dc.date.available 2017-05-09T07:20:05Z
dc.date.issued 2016-12-27
dc.identifier.citation Surana, Neelam; Soni, A.; Umap, Abhijit; Mekie, Joycee and Chaudhuri, S., "Asymmetrically doped FinFET for low-power analog applications", in the 3rd International Conference on Emerging Electronics, IIT Bombay, IN, Dec. 27-30, 2016. en_US
dc.identifier.uri https://repository.iitgn.ac.in/handle/123456789/2920
dc.identifier.uri http://www.iitb.ac.in/en/event/3rd-international-conference-emerging-electronics
dc.description.statementofresponsibility by Neelam Surana, A. Soni, Abhijit Umap, Joycee Mekie and S. Chaudhuri
dc.language.iso en_US en_US
dc.publisher IIT Bombay en_US
dc.title Asymmetrically doped FinFET for low-power analog applications en_US
dc.type Presentation en_US


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