Mismatch resilient 3.5-Bit MDAC with MCS-CFCS

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dc.contributor.author Mohapatra, Satyajit
dc.contributor.author Gupta, Hari Shanker
dc.contributor.author Mohapatra, Nihar Ranjan
dc.contributor.other IEEE Computer Society Annual Symposium on VLSI (ISVLSI-2018)
dc.coverage.spatial Hong Kong, HK
dc.date.accessioned 2018-08-23T05:49:53Z
dc.date.available 2018-08-23T05:49:53Z
dc.date.issued 2018-07-08
dc.identifier.citation Mohapatra, Satyajit; Gupta, Hari Shanker and Mohapatra, Nihar Ranjan, "Mismatch resilient 3.5-Bit MDAC with MCS-CFCS ", in the IEEE Computer Society Annual Symposium on VLSI (ISVLSI-2018), Hong Kong, HK, Jul. 8-11, 2018. en_US
dc.identifier.uri https://repository.iitgn.ac.in/handle/123456789/3878
dc.description.statementofresponsibility by Satyajit Mohapatra, Hari Shanker Gupta and Nihar Ranjan Mohapatra
dc.language.iso en en_US
dc.title Mismatch resilient 3.5-Bit MDAC with MCS-CFCS en_US
dc.type Article en_US


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