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Now showing items 1-10 of 29

Effect of Dynamic Frequency Scaling on Interface Design for Rationally-Related Multi-Clocked Systems

Mekie, Joycee (Institute of Electrical and Electronics Engineers (IEEE), 2014-05)
Network on Chips: The Journey Overview

Mekie, Joycee; Ved, Sneha N. (Institute of Electrical and Electronics Engineers (IEEE), 2014-01-05)
Building new generation chips using Asynchronous logic

Mekie, Joycee (Intel Corporation, 2014-11)
Fault tolerant tactile sensor arrays for prosthesis

Teja, Subrahmanya; Mekie, Joycee (IEEE, 2016-06)
A comparative study of input port and crossbar configurations in NoC router microarchitectures

Ved, Sneha N.; Arya, Aparna; Bhange, Ankit Pritam; Mekie, Joycee (Amity University, 2017-02-02)
Guarded dual rail logic for soft error tolerant standard cell library

Kaur, Raminder; Surana, Neelam; Mekie, Joycee (2016-09-19)
Route-on-fly: a single cycle router

Ved, Sneha N.; Arya, Aparna; Bhange, Ankit Pritam; Mekie, Joycee (Amity University, 2017-02-02)
Comparative study of synchronizer circuits

Sinin, Fathima; Mekie, Joycee (2016-03-11)
Short and deep drain MOSFET for space applications: device and circuit level analysis

Surana, Neelam; Kaur, Raminder; Mekie, Joycee (IEEE, 2016-09-19)
Asymmetrically doped FinFET for low-power analog applications

Surana, Neelam; Soni, A.; Umap, Abhijit; Mekie, Joycee; Chaudhuri, S. (IIT Bombay, 2016-12-27)

Now showing items 1-10 of 29