From variations to precision: modeling and optimization of inner spacer Etch in GAA FETs

Abstract

This work introduces a robust machine learning framework for modeling and optimizing the inner spacer etch process in gate-all-around FET fabrication. Using an in-house Particle Monte-Carlo simulator, the etch process is modeled precisely across varied conditions. Gaussian Process Regression outperforms neural network models, achieving 98-99% accuracy in predicting etch front variations. Bayesian Optimization with adaptive sampling and successive domain reduction is utilized to fine-tune etch parameters, minimizing the error between predicted and target etch fronts. This integrated approach enables precise control over spacer-channel geometry, making this approach highly effective for advanced semiconductor manufacturing.