A hysteretic-controlled digital LDO regulator for enhanced load transient response

Abstract

This work presents a digital low dropout (DLDO) regulator design with integrated hysteretic control (HC) for improved load transient response towards power management applications in low-power low-voltage systems. The proposed control mechanism operates parallel to the DLDO’s standard shift-register (S/R) control during the load transient events, i.e., when the output voltage crosses the preset voltage regulation window, and improves the transient response by providing auxiliary paths for sourcing and sinking current. The proposed HC-integrated DLDO, designed and simulated in a 65 nm CMOS process, achieves ∼4× improved transient response time and ∼5× reduced undershoot voltage over a standard DLDO for a load current step-change of ∼6.5 mA. The peak current efficiency and figure of merit are 99.8 % and 81.05 ps, respectively.