Nanosheet FET based CMOS technology for future electronics: challenges in sheet thickness scaling and solutions

dc.contributor.advisor	Mohapatra, Nihar Ranjan
dc.contributor.author	Kaur, Ramandeep
dc.date.accessioned	2025-09-11T15:52:55Z
dc.date.available	2025-09-11T15:52:55Z
dc.date.issued	2025
dc.identifier.citation	Kaur, Ramandeep. (2025). Nanosheet FET based CMOS technology for future electronics: challenges in sheet thickness scaling and solutions. Gandhinagar: Indian Institute of Technology Gandhinagar, 117p. (Acc. No.: T01309)
dc.identifier.uri	https://repository.iitgn.ac.in/handle/123456789/12006
dc.description.statementofresponsibility	by Ramandeep Kaur
dc.format.extent	xxvi, 117p.: hbk.: 30 cm
dc.language.iso	en_US
dc.publisher	Indian Institute of Technology Gandhinagar
dc.subject	18310035
dc.subject	Ph.D
dc.subject	Electrical Engineering
dc.subject	CMOS Technology
dc.subject	Computational Framework
dc.subject	TCAD Calibration
dc.subject	Sheet Thickness Scaling
dc.subject	Strain Engineering
dc.subject	Design Space Exploration
dc.title	Nanosheet FET based CMOS technology for future electronics: challenges in sheet thickness scaling and solutions
dc.type	Thesis
dc.contributor.department	Electrical Engineering
dc.description.degree	Ph.D.