Effect of channel dimensions and spacer material on drain saturation voltage (VDS,SAT ) of sub-10nm Wf in regime FinFETs

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dc.contributor.advisor Mohapatra, Nihar Ranjan
dc.contributor.author Sharma, Pratik
dc.date.accessioned 2021-10-27T14:12:42Z
dc.date.available 2021-10-27T14:12:42Z
dc.date.issued 2021
dc.identifier.citation Sharma, Pratik (2021). Effect of channel dimensions and spacer material on drain saturation voltage (VDS,SAT ) of sub-10nm Wf in regime FinFETs. Gandhinagar: Indian Institute of Technology Gandhinagar, 61p. (Acc. No.: T00892).
dc.identifier.uri https://repository.iitgn.ac.in/handle/123456789/7183
dc.description.statementofresponsibility by Pratik Sharma
dc.format.extent viii, 61p.: ill.; hbk.; 30 cm.
dc.language.iso en_US
dc.publisher Indian Institute of Technology Gandhinagar
dc.title Effect of channel dimensions and spacer material on drain saturation voltage (VDS,SAT ) of sub-10nm Wf in regime FinFETs
dc.type Thesis
dc.contributor.department Electrical Engineering
dc.description.degree M.Tech


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