The present disclosure relates to the field of data converters. The data converters (Digital-to-Analog Converters and Analog-to-Digital converters) typically consist of large capacitor and transistor arrays that are highly susceptible to systematic errors. The present disclosure discloses an array of systematic effect resilient matched devices for high resolution high speed data converters. Each of the devices is split into an integral number N of identical units connected in parallel. The identical units are spatially intermingled over an array having N rows and N columns, in a way that every column and every row of the array includes exactly one unit of all the devices and the sum of the systematic errors over the spatially distributed units is same for all devices, in order to compensate the systematic errors. A placement methodology along with one track routing solution for complete compensation of the systematic errors is also provided.