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  1. Home
  2. IIT Gandhinagar
  3. Theses (PhD & Masters)
  4. Parametric analysis based identification of yield detractor patterns from ULSI layouts
 
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Parametric analysis based identification of yield detractor patterns from ULSI layouts

Source
Indian Institute of Technology, Gandhinagar
Date Issued
2020-01-01
Author(s)
Nath, Biplob
URI
https://d8.irins.org/handle/IITG2025/32205
Subjects
18250007
Electrical Engineering
Optical Lithography
Micro Lithography
Machine Learning
Lithography Process Variation
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