Device Design of Step Field Plate RF LDMOS Transistor for Improved Power Amplifier Applications

This work discusses the optimization of a Step Field Plate (SFP) RF LDMOS transistor to enhance Power Amplifier (PA) performance. The impact of structural parameters: length of overlap between gate and P-well mask (L_w), between gate and N-LDD mask (L_x) and length of gate (L_G) on transconductance, device capacitances and operating frequency of the transistor is analyzed. Next, they are fine tuned to maximize large signal performance- output power, gain, and efficiency- of a common source PA circuit.