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Home
IIT Gandhinagar
Electrical Engineering
EE Publications
Asymmetrically doped FinFET for low-power analog applications
Details
Asymmetrically doped FinFET for low-power analog applications
Source
3rd International Conference on Emerging Electronic
Date Issued
2016-12-27
Author(s)
Surana, Neelam
Soni, A.
Umap, Abhijit
Mekie, Joycee
Chaudhuri, S.
URI
http://www.iitb.ac.in/en/event/3rd-international-conference-emerging-electronics
http://repository.iitgn.ac.in/handle/IITG2025/30796