Process induced threshold voltage variability in Ultra-Thin Body and Buried Oxide Fully Depleted Silicon on Insulator (UTBB FDSOI) transistors
Source
Indian Institute of Technology, Gandhinagar
Date Issued
2021-01-01
Author(s)
Verma, Ankit Kumar
Subjects
1821009
UTBB FDSOI
Technology Computer-Aided Design -- TCAD
Line Edge Roughness
Metal-gate Granularity
Moore’s Law And Scaling