FeFET-Based MirrorBit Cell for High-Density NVM Storage
Source
IEEE Transactions on Electron Devices
ISSN
00189383
Date Issued
2024-04-01
Author(s)
Meihar, Paritosh
Srinu, Rowtu
Saraswat, Vivek
Lashkare, Sandip
Mulaosmanovic, Halid
Singh, Ajay Kumar
Dunkel, Stefan
Beyer, Sven
Ganguly, Udayan
Abstract
The HfO2-based ferroelectric field-effect transistor (FeFET) has become a center of attraction for nonvolatile memory application because of their low power, fast switching speed, high scalability, and CMOS compatibility. In this work, we show an n-channel FeFET-based multibit memory, termed 'MirrorBit,' which effectively doubles the chip density via programming the gradient ferroelectric polarizations in the gate, using an appropriate biasing scheme. We have experimentally demonstrated MirrorBit on the GlobalFoundries' HfO2-based FeFET devices fabricated at the 28-nm bulk HKMG CMOS technology. Retention of MirrorBit states has been shown up to 105 s at different temperatures. In addition, the endurance is found to be more than 103 cycles. A TCAD simulation is also presented to explain the origin and working of MirrorBit states, based on the FeFET model calibrated using the GlobalFoundries FeFET device. We have also proposed the array-level implementation and sensing methodology of the MirrorBit memory. Thus, we have converted 1-bit FeFET into 2-bit FeFET using programming and reading schemes in the existing FeFET, without the need for any special fabrication process alteration, to double the storage capacity.
Subjects
Band diagram | drain source write/read | ferroelectricity | field-effect transistor (FeFET) | polarization
