Sample-efficient modeling and optimization of high-dimensional semiconductor processes using output-augmented Gaussian process regression and dynamic Bayesian optimization
Source
IEEE Transactions on Semiconductor Manufacturing
ISSN
0894-6507
Date Issued
2026-04-01
Author(s)
Maheshwari, Om
Abstract
Semiconductor process modeling in early stages of process development is challenging due to limited availability of the data, high dimensionality of inputs and outputs, and chamber-to-chamber (C2C) variations. This paper presents a unified ‘OGE’ framework combining Output Augmented Modeling (OAM) to Gaussian Process Regression (GPR), with Ensemble Feature Removal (EFR) to address these issues. EFR robustly eliminates weak predictors across multiple validation trials, while OAM recursively enhances model accuracy by incorporating high-performing outputs as auxiliary inputs. The resulting multi-input single-output models are stitched into a multi-output structure and optimized using Dynamic Bayesian Optimization to meet target specifications. Applied to four semiconductor process datasets with up to 100 input features and fewer than 85 samples, the proposed approach consistently outperforms conventional techniques, demonstrating improved generalization, interpretability, and robustness to C2C variations. The framework provides actionable insights for process tuning and is well-suited for data-driven optimization in early-stage semiconductor manufacturing.
Subjects
Semiconductor process modeling
Process optimization
Gaussian process regression
Output augmented modeling
Ensemble feature reduction
Bayesian optimization
Adaptive sampling
Successive domain reduction
