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  1. Home
  2. IIT Gandhinagar
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  4. EE Publications
  5. Training Free Parameter Extraction for Compact Device Models using Sequential Bayesian Optimization
 
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Training Free Parameter Extraction for Compact Device Models using Sequential Bayesian Optimization

Source
IEEE Electron Devices Technology and Manufacturing Conference Strengthening the Globalization in Semiconductors Edtm 2024
Date Issued
2024-01-01
Author(s)
Maheshwari, Om
Singh, Aishwarya
Mohapatra, Nihar Ranjan  
DOI
10.1109/EDTM58488.2024.10511311
Abstract
This work presents a computationally efficient approach to extract the compact model parameters without extensive training requirements. Bayesian optimization is employed in multiple stages to optimize different model parameters. The methodology is demonstrated on Virtual Source model (MVS 2.0), extended for Nanosheet FET and MoS<inf>2</inf> based 2DFET. Optimization function based on I-V characteristics slope, on and off currents ensures optimum fitting of global as well as local model parameters for diverse devices.
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URI
http://repository.iitgn.ac.in/handle/IITG2025/29120
Subjects
2DFET | Bayesian optimization | compact model | Nanosheet FET | Parameter extraction | Virtual source
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