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  1. Home
  2. IIT Gandhinagar
  3. Electrical Engineering
  4. EE Theses (PhD & Masters)
  5. Design of 61 GHz phase locked loop in 65 nm CMOS technology for 6G wireless communication systems
 
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Design of 61 GHz phase locked loop in 65 nm CMOS technology for 6G wireless communication systems

Source
Indian Institute of Technology, Gandhinagar
Date Issued
2025-01-01
Author(s)
Kumari, Sapna
URI
http://repository.iitgn.ac.in0/handle/IITG2025/32982
Subjects
23250038
M. Tech
Electrical Engineering
Integer-N
CMOS
Phase Locked Loop
Phase-Detector
Signal Frequency Divider
Wireless Communication
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