Low-power sequential circuit design using work-function engineered FinFETs

Sequential circuits like pulsed latches and semi-dynamic flip-flops are extensively used in state-of-the-art high performance microprocessors. In this paper, we proposed a novel approach of exploiting the metal gate workfunction to reduce the power consumption and area of the pulsed latches and semi-dynamic flip-flops made using FinFETs. Compared to the design using standard shorted gate FinFETs, the proposed pulsed latch reduces the dynamic and leakage power by 37% and 42% respectively. Similarly, the proposed semi-dynamic flip-flop shows a reduction of 24% and 32% respectively in dynamic and leakage power consumption compared to the standard design. The proposed circuits also show significant improvement in static noise margin and reduction in area.