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  4. A unified compact model for electrostatics of III–V GAA transistors with different geometries
 
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A unified compact model for electrostatics of III–V GAA transistors with different geometries

Source
Journal of Computational Electronics
ISSN
15698025
Date Issued
2021-10-01
Author(s)
Ganeriwala, Mohit D.
Ruiz, Francisco G.
Marin, Enrique G.
Mohapatra, Nihar R.  
DOI
10.1007/s10825-021-01751-2
Volume
20
Issue
5
Abstract
In this work, a physics-based unified compact model for III-V GAA FET electrostatics is proposed. The model considers arbitrary cross-sectional geometry of GAA FETs viz. rectangular, circular and elliptical. A comprehensive model for cuboid GAA FETs is developed first using the constant charge density approximation. The model is then combined with the earlier developed model for cylindrical GAA FETs to have a unified representation. The efficacy of the model is validated by comparing it with simulation data from a 2D coupled Poisson-Schrödinger solver. The proposed model is found to be, (a) accurate for GAA FETs with different geometries, dimensions and channel materials and (b) computationally efficient.
Unpaywall
URI
http://repository.iitgn.ac.in/handle/IITG2025/25265
Subjects
Capacitance | Charge | Circuit simulation | Compact model | Gate all around FET | III–V | Nanowire | Surface potential
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